US Patent 7283920 Apparatus and method for testing semiconductor device

A phase difference between a timing of rising or falling of the data read from a semiconductor device to be test and a timing of rising or falling of a reference clock outputted synchronized with the data is measured by operating sampling with strobe pulses configured with multi-phase pulses given the phase difference by a small amount in regard to the timing of the data and the timing of the reference clock. In addition, a glitch of the data is detected, and the quality of the semiconductor device to be tested is judged based on the phase difference and/or the glitch.