US Patent 7285816 Content addressable matrix memory cell

A CAM memory cell integrated on a semiconductor substrate includes a plurality of floating gate memory cells, matrix-organized in rows, called word lines, and columns, called bit lines. The cells belonging to a same row and have floating gate electrodes are short-circuited with each other in order to form a single floating gate electrode for the CAM memory cell. Advantageously, the single floating gate electrode is equipped with at least a cavity manufactured in at least a side wall of the single floating gate electrode. A process for manufacturing CAM memory cells integrated on a semiconductor substrate is also described.