Patent attributes
According to one embodiment of this invention, a non-volatile semiconductor memory device of high speed program operation is realized. It provides a non-volatile semiconductor memory device comprising a cell array in which NAND strings having electrically re-programmable memory cells are connected in series are disposed in a matrix form; sense amplifiers for sensing threshold voltages of said memory cells by sensing potentials of bitlines connected to said memory cells and for having a first region having high voltage transistors and a second region having low voltage transistors; cell source lines connected to an end of said NAND strings; and a first cell source line driver being connected to said cell source lines and having a first transistor for supplying a grounding potential or a low potential to said cell source line, said first transistor of said cell source line driver being disposed in said first region of said sense amplifiers.
