Patent attributes
A charge pump circuit capable of canceling current mismatch and suppressing clock feedthrough. The charge pump circuit comprises a current source enabled by a first logical signal, a current sink enabled by a second logical signal, an integrating capacitor coupled to both the current source and the current sink, and a switching device coupled between the integrating circuit and an output node. The switching device has two states. The switching device is set to a first state whenever a third logical signal is asserted and one of the first logical signal, the second logical signal, and a modulating signal is enabled. The switching device is set to a second state whenever the third logical signal is de-asserted, or none of the first logical signal, the second logical signal, and the modulating signal are asserted.
