Patent attributes
A carrier lock detector for a QPSK or 4-QAM system implements a lock detection algorithm that maps detected signals onto one of first and second areas associated with nominal states defined by (I2⊕I3)·(Q2⊕Q3) and Q1⊕Q2·(I1 I2I3+ I1I2I3)+( I1⊕I2)·(Q1 Q2Q3+ Q1Q2Q3), or alternatively, by ( I1⊕I2· Q2⊕Q3)+( Q1⊕Q2· I2⊕I3), respectively. When detected signals map onto one of the first areas, a first signal is generated. When detected signals map onto one of the second areas, a second signal is generated. When a difference between the first and second signals exceeds a threshold, a carrier lock detection signal is generated to enable a decoder. The carrier lock detector is able to detect carrier lock at a raw BER of 1e-2 or greater at a very low signal-to-noise ratio.
