US Patent 7296170 Clock controller with clock source fail-safe logic

A microcontroller integrated circuit with a clock controller and a processor automatically switches the source of the clock signal that clocks the processor from a failed fast external precision oscillator to a slow internal backup oscillator, then enables a fast internal precision oscillator, and finally switches to the fast internal precision oscillator. A failure detection circuit within the clock controller detects a failure of the external precision oscillator and sends an associated interrupt signal to the processor. The clock controller decouples the external oscillator from the processor and couples the backup oscillator to the processor. The microcontroller integrated circuit then enables the fast internal precision oscillator, decouples the backup oscillator, and couples the fast internal precision oscillator to the processor. The microcontroller integrated circuit conserves power by powering up the fast internal precision oscillator only after the external clock source has failed and by then disabling the failure detection circuit.