Patent attributes
A method of forming a gate of a flash memory device, including the steps of forming a tunnel oxide film and a first polysilicon layer in an active region of a semiconductor substrate, an isolation film in the field region, a dielectric layer, a second polysilicon layer, a metal silicide film, and a hard mask film on the structure, etching the hard mask film, the metal silicide film, and a given region of the second polysilicon layer to expose the dielectric layer, stripping a top surface of the exposed dielectric layer of the active region and the field region, a part of the first polysilicon layer of the active region to form dielectric layer horns, the first polysilicon layer and a part of the dielectric layer horns of the active region, and the first polysilicon layer and the dielectric layer horns of the active region.