Patent attributes
Methods of manufacturing a metal-insulator-metal capacitor are provided. An illustrated method includes: forming a lower metal electrode layer pattern in a metal-insulator-metal capacitor region and a lower metal line layer pattern in a metal line region above an insulating layer above a semiconductor substrate; forming an intermetal insulating layer covering the lower metal electrode layer pattern and the lower metal line layer pattern; forming a first trench by removing a portion of the intermetal insulating layer in the metal-insulator-metal capacitor region, a portion of the intermetal insulating layer being left on the lower metal electrode layer pattern; forming a second trench exposing a portion of the lower metal electrode layer pattern by forming an insulating spacer layer on a sidewall of the first trench and removing the remaining intermetal insulating layer under the first trench; forming a dielectric layer over the entire upper surface of the resultant structure; forming a via hole exposing a portion of the lower metal line layer pattern of the metal line region using a predetermined mask layer pattern; and forming an upper metal electrode layer on the dielectric layer within the second trench and a via contact connected to the lower metal line layer pattern within the via hole.
