Patent attributes
A robust symbol timing recovery circuit for a telephone line modem is provided. The symbol timing recovery circuit comprises a timing estimator and an interpolator. The timing estimator, which performs an operation on input samples and estimates a timing offset of a received symbol, outputs a timing offset estimated for each symbol for a first window interval, and thereafter outputs a timing offset estimated in an immediately previous window interval for the current window interval. The interpolator, which performs interpolation using the input samples, comprises a plurality of shift registers which are serially connected and output the input samples in units of a predetermined plural number of input samples, by sequentially delaying for an input sample 15 period and outputting the input samples. Since the symbol timing recovery circuit is not sensitive to clock instability and employs a stable timing offset estimating method, symbol timing can be recovered stably and reliably.