US Patent 7334158 Power fault handling method, apparatus, and system
Patent 7334158 was granted and assigned to Intel on February, 2008 by the United States Patent and Trademark Office.
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Patent Inventor Names
Mark N. Fullerton0
Vasudev J. Bibikar0
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Patent abstract
A processor may receive multiple signals corresponding to potential power faults. A control register in the processor may specify actions to be taken for each of the potential power faults.
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US Patent 07334158 Power fault handling method, apparatus, and system US Patent 7334158 Power fault handling method, apparatus, and system
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Patent Number
07334158
Patent Number
7334158
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US Patent 07334158 Power fault handling method, apparatus, and system
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Is a
Current assignee
Patent jurisdiction
Patent number
07334158
Date of patent
February 19, 2008
Patent application number
10879515
Date Filed
June 29, 2004
Patent primary examiner
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