US Patent 7336099 Multiplexer including addition element

A multiplexer can be implemented in a programmable logic device, using addition elements which are optimised for performing a one-bit addition function. A logic device receives a first data input value and a first select input. The logic device then routes the first data input to the addition element as a first input one-bit value, and routes either the first data input or its inverse to the addition element as a second input one-bit value, depending on the value of the first select input.