Patent attributes
A method for manufacturing a semiconductor element includes preparing an SOI layer having a transistor forming area and an element isolation area, forming an oxidation-resistant mask layer on the SOI layer, forming a resist mask over the transistor forming area on the oxidation-resistant mask layer, a first etching that etches the oxidation-resistant mask layer using the resist mask so that a predetermined thickness of the oxidation-resistant mask layer remains, a second etching that etches the remaining oxidation-resistant mask layer, using the resist mask and exposing the SOI layer at the element isolation area, and oxidizing the exposed SOI layer using the remaining oxidation-resistant mask layer, to form an element isolation layer. An etching rate during the first etching is higher than during the second etching and a silicon-to-etching selection ratio during the second etching is higher than during the first etching.
