Patent attributes
A method of fabricating a thin film transistor is disclosed. The method comprises forming an amorphous silicon layer overlying a substrate. A first heat treatment is then performed to reduce the hydrogen atom concentration of the amorphous silicon layer. Next, the amorphous silicon layer is patterned to form an island-shaped amorphous silicon pattern. An insulating layer is then formed over the island-shaped amorphous silicon pattern followed by forming a gate electrode on the insulating layer. Ions are then implanted into the island-shaped amorphous silicon pattern to form an ion doped region. A heat treatment is then performed to transfer the island-shaped amorphous silicon pattern into an island-shaped polysilicon pattern and simultaneously activate the ion doped region using laser annealing. A passivation layer is formed on the island-shaped polysilicon pattern followed by etching the passivation layer to form openings exposing the ion doped area.
