Patent attributes
In a resolver digital converter comprising a resolver, a resolver digital conversion part, and an excitation signal generation part, the resolver digital converter for inputting an excitation signal generated in the excitation signal generation part to the resolver and inputting resolver signals outputted from the resolver to the resolver digital conversion part, a locus in which amplitude of a sine component signal among the resolver signals sin(θ), cos(θ) outputted from the resolver is plotted as the ordinate axis and amplitude of a cosine component signal is plotted as the abscissa axis is approximated by a polygon and when the locus matches with sides of the approximated polygon, it is determined that the resolver is in a normal state and when the locus does not match, it is determined that the resolver is in a failure state.
