Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Charvaka Duvvury0
Gianluca Boselli0
Date of Patent
March 25, 2008
Patent Application Number
11447359
Date Filed
June 6, 2006
Patent Primary Examiner
Patent abstract
A semiconductor dual guardring arrangement is provided which is useful during electrostatic discharge (ESD) events as well as during normal operating conditions. In particular, an inner guard that is located closer to an active area provides desirable performance during normal operating conditions, while an outer guardring located further from the active area provides desirable performance during an ESD event.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
