Patent attributes
A level shift circuit has a driving circuit and an output circuit. The driving circuit has a clamp circuit for receiving first and second bias potentials, outputting first and second drive signals which are not less than a reference potential, less than the first bias potential, and complementary to each other, and also outputting third and fourth drive signals which are higher than the second bias potential, not more than a power source potential, and complementary to each other. The output circuit has a first output transistor of a first conductivity type and a second output transistor of a second conductivity type which are connected in series to each other. The first output transistor has a gate for receiving the first drive signal and one electrode for receiving the reference potential. The second output transistor has a gate for receiving the third drive signal and one electrode for receiving the power source potential.
