US Patent 7349233 Memory device with read data from different banks

In some embodiments, a chip includes at least four groups of memory banks and at least four groups of output conductors wherein each group of output conductors corresponds to a different one of the groups of memory banks. The chip also includes circuitry to perform a read operation by providing read data from at least one of the banks of each of the groups of memory banks to its corresponding group of output conductors. Other embodiments are described.