Patent attributes
A memory system comprising router nodes. A plurality of router nodes are configured to route data between a memory controller and memory modules. The topology of the system comprises a hierarchy of one or more levels. Each of the levels includes one or more router nodes which may be configured to forward received data to another router node at the same level, or forward received data to a next lower level in the hierarchy. Router nodes in the system are configured to correspond to a particular level and position within the hierarchy. The memory controller generates a broadcast transaction to router nodes in the system. In response to receiving the transaction, the router nodes configure their internal routing mechanisms. Subsequently, the controller generates a memory access which is then routed by the router nodes to the target memory modules. Routing is such that memory modules not targeted by the memory access do not see the memory access.
