US Patent 7353430 Device for validating an integrated circuit

A device (10) for validating a circuit (1) comprising at least one microprocessor (3) and a specialized unit (2) provided with registers includes a base (11) for receiving the circuit, a memory (4, 5) simulating an external memory with which the circuit is intended to cooperate and a computer (20) controlling the validation. The memory (4, 5) contains software for processing data received by the circuit and instructions for executing a validation sequence, making it possible to form a data flow representing a flow received by the circuit in normal operation, to compare data contained in registers of the circuit with theoretical values and to supply a signature representing a result of these comparisons.