Patent attributes
A layout editor apparatus draws line segments constituting a first interconnect line connecting between an output pin and a first input pin so as to draw the first interconnect line as a straight line formed of the line segments connected in a line extending from the output pin only in a first direction, and draws line segments constituting a second interconnect line connecting between a branch point and a second input pin so as to draw the second interconnect line as a straight line formed of the line segments connected in a line extending only in the first direction from a point that is displaced from the branch point on the first interconnect line in a second direction perpendicular to the first direction, wherein the displayed lengths of the line segments are proportional to their physical lengths, and the displayed widths of the line segments reflect their physical widths.
