Patent attributes
A semiconductor device comprises a semiconductor substrate having an upper surface and a lower surface. A semiconductor layer is formed on the upper surface of the semiconductor substrate. A base region of a first conduction type is formed in the semiconductor layer. A source region of a second conduction type is formed in the base region. A drain region of the second conduction type is formed apart from the source region in the semiconductor layer. A gate electrode is formed on a gate insulator above the semiconductor layer between the source region and the drain region. A first interlayer insulator is formed on the semiconductor layer to cover the gate electrode. A short electrode is formed to short the base region and the source region. A second interlayer insulator is formed to cover the first interlayer insulator and the short electrode. A drain electrode is formed over the second interlayer insulator and connected to the drain region with the use of a contact hole formed through the first and second interlayer insulators. A source electrode is formed on the lower surface of the semiconductor substrate. The short electrode extends over the first interlayer insulator from the source region toward the drain region. A side of the short electrode at least coincides with a side of the gate electrode located toward the drain region with respect to positions in a direction defined as directing from the source region toward the drain region.
