US Patent 7358595 Method for manufacturing MOS transistor

Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer and a gate electrode on the exposed substrate surface; forming a LDD region in the substrate under the buffer pattern; forming a spacer on a top surface of the buffer pattern and sidewalls of the gate electrode; and forming a source/drain region in the substrate under the buffer pattern.