Patent attributes
A method of reducing the settling time of an amplifier includes providing a pre-set voltage on a high gain node of the amplifier when the amplifier is disabled. This pre-set voltage can be slightly less than the regulated voltage. In this manner, when the amplifier is enabled, the high gain node can quickly reach this regulated voltage. The pre-set voltage can be applied to the high gain node by operating a switch, e.g. if the amplifier is enabled (disabled), then the switch is open (closed). A startup circuit can generate the pre-set voltage. This startup circuit can include a startup current source and a transistor connected in series between VDD and VSS. The switch can be connected to the gate and drain of the transistor. Notably, the transistor can be the same type of device as the MOS device driven by the high gain node in the amplifier.
