US Patent 7359009 Flat panel display with structure preventing electrode line openings

A flat panel display with a structure preventing electrode line openings. The flat panel display includes a substrate, a gate line, an insulating layer, an etching buffer layer, and a data line. The gate line is disposed on the substrate. The insulating layer covers the gate line and the substrate. The etching buffer layer overlies the insulating layer and is aligned with the gate line. The data line is overlying the etching buffer layer and the substrate and extends perpendicular to the gate line. The etching buffer layer overlapping the data line has non-linear edges so as to prevent lateral etching during data line etching.