US Patent 7359262 Semiconductor memory device

A semiconductor memory device according to the present invention where the entire memory area determined by an array of memory cells is divided into a plurality of memory areas comprises at least one relief memory area for redundancy relieving a fault memory area which contains a fault memory cell, a fault address storing means in which a fault address is stored, a comparator circuit for comparing an address of the memory area specified by an input address with the fault address and when the input address corresponds to the fault address, selecting the corresponding relief memory area, wherein the comparator circuit selects the corresponding relief memory area upon receiving from the outside a relief memory area select signal indicative of selection of the relief memory area even when the address of the memory area specified by the address input does not correspond to the fault address.