Patent attributes
A semiconductor die assembly includes a substantially planar lead frame including a die paddle and a plurality of lead fingers, a first semiconductor die secured by an active surface thereof to the die paddle, a second semiconductor die secured by a backside thereof to the die paddle, wire bonds extending from the first semiconductor die and the second semiconductor die to lead fingers of the plurality, and an encapsulant extending over the first semiconductor die, the second semiconductor die, the die paddle, the wire bonds and portions of the lead fingers. A method of fabricating the semiconductor die assembly and an electronic system incorporating the semiconductor die assembly are also disclosed.