Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
May 13, 2008
Patent Application Number
11452697
Date Filed
June 14, 2006
Patent Citations Received
0
...
Patent Primary Examiner
Patent abstract
A NAND memory architecture arranges all even bitlines of a page together, and arranges all odd bitlines of a page together, so that programming operations are carried out on adjacent bitlines on the same word line to reduce floating gate coupling. Non-connected bitlines can be used at boundaries between even and odd sections of the array to further reduce floating gate coupling.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
