US Patent 7373437 Multi-channel DMA with shared FIFO
Patent 7373437 was granted and assigned to Texas Instruments on May, 2008 by the United States Patent and Trademark Office.
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A direct memory access (DMA) circuit (200) includes a read port (202) and a write port (204). The DMA circuit (200) is a multithreaded initiator with “m” threads on the read port (202) and “n” threads on the write port (204). The DMA circuit (200) includes a data FIFO (210) which is shared by all of the logical channels and the FIFO depth can be allocated dynamically allowing for the maximum number of channels to be scheduled and concurrently active. The FIFO (210) can also be allocated to a single channel if there is only one logical channel active. The FIFO (210) increases the DMA's transfer performance, pre-fetch capacity and buffering, while maximizing pipelining.
US Patent 07373437 Multi-channel DMA with shared FIFO US Patent 7373437 Multi-channel DMA with shared FIFO
US Patent 07373437 Multi-channel DMA with shared FIFO
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