US Patent 7374975 Method of fabricating a transistor

A method of forming a transistor reduces leakage current and hot carrier effects, and therefore improves current performance. The method of forming a transistor includes selectively etching the semiconductor substrate to form a substrate protrusion and expose a buried source/drain implant region. A gate insulating layer covers the substrate protrusion and the first source/drain region. A gate conductor layer is selectively etched to form a gate pattern covering the sidewalls of the substrate protrusion and a portion of the semiconductor substrate adjacent to the sidewalls of the substrate protrusion. A second source/drain region is stacked over the top of the substrate protrusion. Contacts connected to the gate pattern and the first and second source/drain regions.