Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
May 20, 2008
Patent Application Number
11016762
Date Filed
December 21, 2004
Patent Primary Examiner
Patent abstract
A method for providing the layout design of semiconductor integrated circuit that is capable of promoting the reduction of the circuit pattern area is provided. A hole pattern is disposed at the mesh point which is an intersecting point of mutually orthogonal virtual grid lines and another hole pattern is not disposed at the adjacent mesh point that is the closed mesh point having the hole pattern thereon.
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