Patent 7387959 was granted and assigned to Micron Technology on June, 2008 by the United States Patent and Trademark Office.
The invention includes methods of fabricating integrated circuitry. In one implementation, at least two different elevation conductive metal lines are formed relative to a substrate. Then, interconnecting vias are formed in a common masking step between, a) respective of the at least two different elevation conductive metal lines, and b) respective conductive nodes. Interconnecting conductive metal is provided within the interconnecting vias. Other aspects and implementations are contemplated.