US Patent 7388542 Method for an element using two resist layers
Patent 7388542 was granted and assigned to RCD Technology on June, 2008 by the United States Patent and Trademark Office.
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Patent Inventor Names
Robert R. Oberle0
Sandra M. Garby0
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Patent abstract
A two resist layer process allows a seed layer to be used to electroplate a conductive layer of an element in a way that a portion of the seed layer can be removed.
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US Patent 07388542 Method for an element using two resist layers US Patent 7388542 Method for an element using two resist layers
Infobox
Patent Number
073885420
Patent Number
73885420
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
073885420
Date of Patent
June 17, 2008
0Patent Application Number
112713610
Date Filed
November 10, 2005
0Official Website
Patent Primary Examiner
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US Patent 07388542 Method for an element using two resist layers
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07388542
Date of patent
June 17, 2008
Patent application number
11271361
Date Filed
November 10, 2005
Patent primary examiner
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