US Patent 7392277 Cascaded domino four-to-two reducer circuit and method
Patent 7392277 was granted and assigned to Intel on June, 2008 by the United States Patent and Trademark Office.
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Patent Inventor Names
Thomas D. Fletcher0
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Patent abstract
A cascaded differential domino four-to-two reducer. In an embodiment, the four-to-two reducer is constructed of a first three-to-two reducer and a second three-to-two reducer directly connected to the first three-to-two reducer. In a further embodiment, the first and second three-to-two reducer both include a symmetric carry generate gate.
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US Patent 07392277 Cascaded domino four-to-two reducer circuit and method US Patent 7392277 Cascaded domino four-to-two reducer circuit and method
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Patent Number
07392277
Patent Number
7392277
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US Patent 07392277 Cascaded domino four-to-two reducer circuit and method
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Patent jurisdiction
Patent number
07392277
Date of patent
June 24, 2008
Patent application number
09893868
Date Filed
June 29, 2001
Patent primary examiner
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