US Patent 7397642 ESD protection circuit
Patent 7397642 was granted and assigned to Silicon Integrated Systems on July, 2008 by the United States Patent and Trademark Office.
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Patent Inventor Names
Chien-Ming Lee0
Ming-Dou Ker0
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Patent abstract
An ESD protection circuit is disclosed. The ESD protection circuit includes a stacked MOS circuit, and a trigger current generator. The object of the stacked MOS circuit is to be the first releasing path of the ESD current; the object of the trigger current generator is to generate the trigger current to turn on the stacked MOS circuit, and then the stacked MOS circuit would be the first releasing path of the ESD current.
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US Patent 07397642 ESD protection circuit US Patent 7397642 ESD protection circuit
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Patent Number
073976420
Patent Number
73976420
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Is a
Current Assignee
Patent Jurisdiction
Patent Number
073976420
Date of Patent
July 8, 2008
0Patent Application Number
112802150
Date Filed
November 17, 2005
0Official Website
Patent Primary Examiner
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US Patent 07397642 ESD protection circuit
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07397642
Date of patent
July 8, 2008
Patent application number
11280215
Date Filed
November 17, 2005
Patent primary examiner
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