US Patent 7398070 Variable gain amplifying circuit with matchable input/output impedance

A variable gain amplifying circuit includes a gate-grounded amplifying FET and a collector-grounded amplifying transistor. A gate voltage of the FET and a base voltage of the transistor are adjusted by a supplied AGC voltage. When an input RF signal has small amplitude, the gate voltage is increased by a high AGC voltage so as to increase a main current of the FET, thereby increasing a signal gain of the FET. When the input RF signal has large or medium amplitude, the gate voltage is decreased by a low AGC voltage so as to decrease a main current of the FET, thereby decreasing the signal gain of the FET.