US Patent 7400047 Integrated circuit with stacked-die configuration utilizing substrate conduction

An integrated circuit comprises a plurality of integrated circuit die arranged in a stack, with a given die other than a top die of the stack carrying current for itself and at least one additional die of the stack via substrate conduction. In one arrangement, each of the die other than a bottom die of the stack carries its power supply current by substrate conduction via a bus or other power supply conductor of an underlying die.