US Patent 7402757 Method, system, and apparatus for reducing transition capacitance
Patent 7402757 was granted and assigned to Sun Microsystems on July, 2008 by the United States Patent and Trademark Office.
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Patent Inventor Names
Leesa M. Noujeim0
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Patent abstract
A printed circuit board (PCB) is provided. The PCB includes a signal layer, a first reference plane defined adjacent to a first side of the signal layer, and a via passing through the signal layer and the first reference plane. The first side of the signal layer is either above the signal layer or below the signal layer. The via is configured to accept an electrical signal to be routed on the signal layer. The inner area of the first reference plane up to the via is capable of being eliminated.
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US Patent 07402757 Method, system, and apparatus for reducing transition capacitance US Patent 7402757 Method, system, and apparatus for reducing transition capacitance
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Patent Number
074027570
Patent Number
74027570
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Current Assignee
Patent Jurisdiction
Patent Number
074027570
Date of Patent
July 22, 2008
0Patent Application Number
111334990
Date Filed
May 19, 2005
0Official Website
Patent Primary Examiner
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US Patent 07402757 Method, system, and apparatus for reducing transition capacitance
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07402757
Date of patent
July 22, 2008
Patent application number
11133499
Date Filed
May 19, 2005
Patent primary examiner
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