US Patent 7404155 Merging multiplexers to reduce ROM area
Patent 7404155 was granted and assigned to Altera on July, 2008 by the United States Patent and Trademark Office.
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Systems and method for reducing the die area occupied by a programmable logic device are provided. The systems and methods relate to a programmable logic device comprising a plurality of multiplexers. A portion of the multiplexers form a multiplexer cone. The cone is characterized in that all but one of the multiplexers in the cone has an output which only feeds data inputs of other multiplexers in the cone. Methods according to the invention preferably include identifying two multiplexers in the cone. The two multiplexers are selected based on the fact that the two multiplexers receive substantially identical data inputs and are not used by the programmable logic device to provide outputs during a single clock cycle. Finally, systems and methods according to the invention merge the functions of the two multiplexers into a single merged multiplexer.
US Patent 07404155 Merging multiplexers to reduce ROM area US Patent 7404155 Merging multiplexers to reduce ROM area
US Patent 07404155 Merging multiplexers to reduce ROM area
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