US Patent 7411845 Redundancy circuit and semiconductor apparatus having the redundancy circuit

When a redundancy circuit is fully used and a further defect is present, an irreparable-state signal is produced. When the irreparable-state signal is produced, a defect is judged. When the irreparable-state signal is not produced, upon testing for quality judgment, extraction of a defective memory cell, programming an address of the defective memory cell into a fuse, and confirmation about whether or not the address is properly programmed are carried out. Quality judgment is possible only by confirming address information of the written address as confirmation after programming into the electric fuse.