US Patent 7415494 Divider apparatus and associated method

A method of dividing, in a micro computer unit (MCU), a first binary number (N), having a first number of significant bits, by a second binary number (D), having a second number of significant bits, produces an integer result (Y). The method includes: determining the difference (K) between the first and second numbers of significant bits; aligning the most significant bits (MSBs) of N and D by shifting the bits of D, by K bit positions, such that its MSB occupies the same relative bit position as the MSB of N; repeating K times: multiplying Y by 2; dividing D by 2; and, if N is greater than or equal to D: increasing Y by 1; setting N equal to N−D.