Patent attributes
A system for parallel data transmission including a master device and a slave device is provided. The master device includes a first and a second I/O ports for outputting a read signal and a write signal, respectively. The slave device includes a third and a fourth I/O ports electrically coupled to the first and the second I/O ports, respectively. When the master device outputs the read or the write signal, the slave device transmits status information of the slave device to the master device after the master device has transmitted an address latch enable signal and before the slave device receives the address latch enable signal which is active. The master device outputs an address signal after transmitting the address latch enable signal and latches the address signal for the addressing for reading or writing data after the slave device has received the address latch enable signal.
