Patent attributes
A method of manufacturing a semiconductor device, comprising a first step of forming a layer insulation film on a lower layer wiring provided on a substrate and forming a connection hole in the layer insulation film, a second step of forming an alloy layer composed of a first metallic material constituting the lower layer wiring and a second metallic material different from the first metallic material, on the surface side of the lower layer wiring in the region to be a bottom portion of the connection hole, a third step of sputter-etching the alloy layer, and a fourth step of forming a via in the connection hole in the state of reaching the lower layer wiring; and the semiconductor device.