US Patent 7420403 Latch circuit and flip-flop

A high-reliability, multi-threshold complementary metal oxide semiconductor (CMOS) latch circuit is presented that uses both low and high threshold inverters. The multi-threshold latch circuit includes: a low threshold forward clock inverter inverting an input-terminal logic state and applying the inverted logic state to an output-terminal logic state when a clock is in a first logic state; and a high threshold backward clock inverter forming a circular latch structure together with the forward clock inverter, and inverting an input-terminal logic state and applying the inverted logic state to an output logic state when the clock is in a second logic state.