Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Tony Dambrauskas0
Ralph Lane0
Date of Patent
September 23, 2008
0Patent Application Number
111732450
Date Filed
June 30, 2005
0Patent Primary Examiner
Patent abstract
The present invention uses a two step plasma etch process to create a via contact with an integral bump. After the via and bump have been plated, the semiconductor substrate is planarized to remove the excess metal, using the semiconductor substrate as a planar stop. The bulk silicon substrate surrounding the bumps are plasma etched back to expose the bumps for assembly.
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