Patent attributes
A method of fabricating wafer level package is provided. The method includes the following steps. Firstly, a wafer having a front surface and a rear surface is provided, and the front surface has several conductive pads. Next, a supporting material is attached on the front surface. Then, several holes are formed on the wafer, and the holes run from the rear surface to the front surface. A first substrate is attached on the rear surface. The first substrate has several conductive pillars correspondingly inserted into the holes. Afterwards, the supporting material is removed to expose the conductive pillars on the front surface, and a patterned circuit is formed on the front surface. Next, a second substrate is attached on the patterned circuit. Then, several conductive structures are formed on the first substrate.
