US Patent 7429509 Method for forming a semiconductor device
Patent 7429509 was granted and assigned to Nanya Technology Corporation on September, 2008 by the United States Patent and Trademark Office.
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A method for forming a semiconductor device. A substrate is provided, wherein the substrate has recessed gates and deep trench capacitor devices therein. Protrusions of the recessed gates and upper portions of the deep trench capacitor devices are revealed. Spacers are formed on sidewalls of the upper portions and the protrusions. Buried portions of conductive material are formed in spaces between the spacers. The substrate, the spacers and the buried portions to form parallel shallow trenches are patterned to form parallel shallow trenches for defining active regions. A layer of dielectric material is formed in the shallow trenches, wherein some of the buried portions serve as buried contacts.
US Patent 07429509 Method for forming a semiconductor device US Patent 7429509 Method for forming a semiconductor device
US Patent 07429509 Method for forming a semiconductor device
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