US Patent 7433228 Multi-bit flash memory device having improved program rate

A method is provided for programming a nonvolatile memory array including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element having at least two charge storage areas for storing at least two independent charges, a source region and a drain region. The method includes designating at least one memory cell as a high-speed memory cell and pre-conditioning the high-speed memory cells by placing a first of the at least two charge storage areas into a programmed state, and subsequently enabling the programming on the second area with much higher rate.