Patent attributes
An integrated circuit requires on-chip termination resistor for minimizing reflections from input signals supplied by an external signal source. The input signal is applied across two bonding pads which serve as input terminals for the integrated circuit. The first bonding pad is coupled to a first on-chip terminating resistor through a first on-chip inductor. The second bonding pad is coupled to a second on-chip terminating resistor though a second on-chip inductor. The two on-chip inductors are arranged in a transformer configuration where the mutual inductance relative to the applied input signal is negative. During operation, the on-chip transformer arrangement effectively shorts common-mode signals to the on-chip terminating resistors and effectively blocks differential-mode signals from the on-chip terminating resistors. Effective bandwidth and common-mode rejection performance is improved with the described on-chip transformer arrangement.
