US Patent 7437401 Multiplier-accumulator block mode splitting

Patent 7437401 was granted and assigned to Altera on October, 2008 by the United States Patent and Trademark Office.

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Patent Citations Received

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US Patent 11907719 FPGA specialist processing block for machine learning

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Patent Inventor Names

Gregory Starr0

Kumara Tharmalingam0

Leon Zheng0

Martin Langhammer0

Paul Metzgen0

Steven Perry0

William Hwang0

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Patent abstract

A programmable logic device is provided that includes a MAC block having mode splitting capabilities. Different modes of operation may be implemented simultaneously whereby the multipliers and other DSP circuitry of the MAC block may be allocated among the different modes of operation. For example, one multiplier may be used to implement a multiply mode while another two multipliers may be used to implement a sum of two multipliers mode.

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Official Website

https://pdfpiw.uspto.gov/.piw?Docid=074374010

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