Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Md Rezwanur Rahman0
Michael Spica0
Hehching Harry Li0
Date of Patent
October 14, 2008
0Patent Application Number
109554200
Date Filed
September 30, 2004
0Patent Primary Examiner
Patent abstract
Methods and apparatus to test memories, such as, for example, caches of processors, are disclosed. In one aspect, an apparatus may include a pseudo random address generation unit, such as, for example, including a linear feedback shift register, to generate pseudo random memory addresses, and a deterministic data generation unit, such as, for example, including a state machine, to generate deterministic data to be written to the pseudo random memory addresses. Computer systems and other electronic systems including such apparatus are also disclosed.
Timeline
No Timeline data yet.
Further Resources
No Further Resources data yet.
